OCIN06: Future Directions for On-Chip Interconnection Networks
29:52
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3 years ago
Bill Dally, Stanford
On-chip interconnection networks have different constraints than off-chip networks. They are implemented with technology which gives very different channel characteristics and network element costs than their off-chip counterparts. The optimal design of an on-chip network is very sensitive to the properties of network elements (channels, buffers, and switches). Aggressive circuit design of these elements can realize large improvements in energy and performance. This enabling circuit technology changes the optimal network design and should be regarded as a prerequisite for network design studies. This talk discusses circuit and architecture issues in on-chip interconnection network design and proposes a research agenda.Bill Dally, Stanford
On-chip interconnection networks have different constraints than off-chip networks. They are implemented with techno...all »Bill Dally, Stanford
On-chip interconnection networks have different constraints than off-chip networks. They are implemented with technology which gives very different channel characteristics and network element costs than their off-chip counterparts. The optimal design of an on-chip network is very sensitive to the properties of network elements (channels, buffers, and switches). Aggressive circuit design of these elements can realize large improvements in energy and performance. This enabling circuit technology changes the optimal network design and should be regarded as a prerequisite for network design studies. This talk discusses circuit and architecture issues in on-chip interconnection network design and proposes a research agenda.«
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